Async SRAM chip, 4M-bit density, organized as 512K x 8 words. Features a 45ns maximum access time and operates from a 4.5V to 5.5V supply, with a typical 5V requirement. This surface-mount component is housed in a 36-pin TFBGA package with a 0.75mm pin pitch, measuring 8mm x 6mm x 0.94mm. Ideal for applications requiring fast, asynchronous memory access.
PackageTFBGA
MountingSurface Mount
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Technical Specifications
Lyontek LY625128GL-45SLET technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | TFBGA |
| Package Description | Thin Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 36 |
| PCB | 36 |
| Package Length (mm) | 8 |
| Package Width (mm) | 6 |
| Package Height (mm) | 0.94(Max) |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.75 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 4Mbit |
| Address Bus Width | 19bit |
| Maximum Access Time | 45ns |
| Timing Type | Asynchronous |
| Density in Bits | 4194304bit |
| Maximum Operating Current | 70mA |
| Typical Operating Supply Voltage | 5V |
| Number of Bits per Word | 8bit |
| Number of Ports | 1 |
| Number of Words | 512K |
| Min Operating Supply Voltage | 4.5V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -20°C |
| Max Operating Temperature | 80°C |
Compliance
| EU RoHS | Yes |
| HTS Code | 8542320041 |
| Schedule B | 8542320040 |
| ECCN | 3A991.b.2.a |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Lyontek LY625128GL-45SLET Datasheet
Download the complete datasheet for Lyontek LY625128GL-45SLET to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.