Async SRAM chip, 4M-bit density, organized as 512K x 8 bits. Features a 70ns maximum access time and operates from a 2.7V to 5.5V supply, with a typical 3V operating voltage. This surface-mount component is housed in a 32-pin TSOP-II package with a 1.27mm pin pitch. It offers a 19-bit address bus and a maximum operating current of 50mA.
PackageTSOP-II
MountingSurface Mount
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Technical Specifications
Lyontek LY62W5128WL-70LLT technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSOP-II |
| Package Description | Thin Small Outline Package (Type II) |
| Lead Shape | Gull-wing |
| Pin Count | 32 |
| PCB | 32 |
| Package Length (mm) | 20.95 |
| Package Width (mm) | 10.16 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-024BA |
| Density | 4Mbit |
| Address Bus Width | 19bit |
| Maximum Access Time | 70ns |
| Timing Type | Asynchronous |
| Density in Bits | 4194304bit |
| Maximum Operating Current | 50mA |
| Typical Operating Supply Voltage | 3V |
| Number of Bits per Word | 8bit |
| Number of Ports | 1 |
| Number of Words | 512K |
| Min Operating Supply Voltage | 2.7V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| EU RoHS | Yes |
| HTS Code | 8542320041 |
| Schedule B | 8542320040 |
| ECCN | 3A991.b.2.a |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Lyontek LY62W5128WL-70LLT Datasheet
Download the complete datasheet for Lyontek LY62W5128WL-70LLT to view detailed technical specifications.
No datasheet is available for this part.