16-pin SOIC W surface mount processor supervisor with a 4.62V reset threshold, monitoring voltages from 4.5V to 5.5V. Features one supervisor with active high, active low, open drain, and push-pull output drivers. Includes a watchdog timer and operates within a 0°C to 70°C temperature range. The wide body plastic package has gull-wing leads and a 1.27mm pin pitch.
PackageSOIC W
MountingSurface Mount
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Technical Specifications
Maxim DS1232S/T&R/C07 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | SOIC W |
| Package Description | Small Outline IC Wide Body |
| Lead Shape | Gull-wing |
| Pin Count | 16 |
| PCB | 16 |
| Package Length (mm) | 10.5(Max) |
| Package Width (mm) | 7.6(Max) |
| Package Height (mm) | 2.35(Max) |
| Seated Plane Height (mm) | 2.65(Max) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-013AA |
| Output Driver | Active High/Active Low/Open Drain/Push-Pull |
| Number of Supervisors | 1 |
| Minimum Reset Threshold Voltage | 4.5V |
| Typical Reset Threshold Voltage | 4.62V |
| Maximum Reset Threshold Voltage | 4.74V |
| Monitored Voltage | 4.5 to 5.5V |
| Min Operating Supply Voltage | 4.5V |
| Typical Operating Supply Voltage | 5V |
| Max Operating Supply Voltage | 5.5V |
| Maximum Supply Current | 2000uA |
| Maximum Reset Active Time | 1000ms |
| Power Fail Detection | No |
| Watchdog Timer | Yes |
| Manual Reset | No |
| Chip Enable Signals | No |
| Battery Backup Switching | No |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | 1ES66 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Maxim DS1232S/T&R/C07 Datasheet
Download the complete datasheet for Maxim DS1232S/T&R/C07 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.