Complex Programmable Logic Device (CPLD) featuring 750 gates and 10 macro cells. Operates at a maximum frequency of 71MHz with a 5V supply voltage (4.5V to 5.5V range). This through-hole mounted CDIP package offers 10 programmable I/Os and a propagation delay of 15ns. EEPROM memory type and a 15ns turn-on delay are included.
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| Package/Case | CDIP |
| Contact Plating | Tin, Lead |
| Frequency | 71MHz |
| Lead Free | Lead Free |
| Max Frequency | 71MHz |
| Max Operating Temperature | 125°C |
| Memory Type | EEPROM, |
| Min Operating Temperature | -55°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 4.5V |
| Mount | Through Hole |
| Number of Gates | 750 |
| Number of I/Os | 10 |
| Number of Macro Cells | 10 |
| Number of Macrocells | 10 |
| Number of Programmable I/O | 10 |
| Operating Supply Voltage | 5V |
| Package Quantity | 15 |
| Packaging | Rail/Tube |
| Propagation Delay | 15ns |
| Radiation Hardening | No |
| RoHS Compliant | No |
| Series | ATF750C(L) |
| Speed Grade | 15 |
| Turn-On Delay Time | 15ns |
| RoHS | Not CompliantNo |
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