2M-bit NOR Flash memory with a parallel interface, featuring 256K words x 8 bits organization and an 18-bit address bus. This component offers a maximum access time of 55ns and operates with a 5V supply voltage, supporting programming voltages from 4.5V to 5.5V. The memory utilizes a sectored, asymmetrical block architecture with a top boot block. Packaged in a 32-pin PDIP (Plastic Dual In Line Package) for through-hole mounting, it operates within a temperature range of 0°C to 70°C.
PackagePDIP
MountingThrough Hole
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Technical Specifications
Micron M29F002BT55P1 technical specifications.
General
| Basic Package Type | Through Hole |
| Package Family Name | DIP |
| Package/Case | PDIP |
| Package Description | Plastic Dual In Line Package |
| Lead Shape | Through Hole |
| Pin Count | 32 |
| PCB | 32 |
| Package Length (mm) | 42.04(Max) |
| Package Width (mm) | 13.84(Max) |
| Package Height (mm) | 4.06(Max) |
| Seated Plane Height (mm) | 5.08(Max) |
| Pin Pitch (mm) | 2.54 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Jedec | MO-015AP |
| Density | 2Mbit |
| Interface Type | Parallel |
| Maximum Operating Current | 15mA |
| Block Organization | Asymmetrical |
| Architecture | Sectored |
| Programming Voltage | 4.5 to 5.5V |
| Timing Type | Asynchronous |
| Maximum Access Time | 55ns |
| Number of Words | 256K |
| Boot Block | Yes |
| Typical Operating Supply Voltage | 5V |
| Address Bus Width | 18bit |
| Location of Boot Block | Top |
| Number of Bits per Word | 8bit |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | 6Y440 |
| HTS Code | 8542320071 |
| Schedule B | 8542320070 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Micron M29F002BT55P1 Datasheet
Download the complete datasheet for Micron M29F002BT55P1 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.