1M-bit NOR Flash memory with parallel interface, featuring 120ns maximum access time. This component offers asymmetrical block organization and sectored architecture, supporting 128K x 8 or 64K x 16 word configurations. Operates with a 5V supply voltage and 4.5 to 5.5V programming voltage. Packaged in a 48-pin TSOP (Thin Small Outline Package) for surface mounting, with a 0.5mm pin pitch.
PackageTSOP
MountingSurface Mount
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Technical Specifications
Micron M29F100T120XN1TR technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSOP |
| Package Description | Thin Small Outline Package |
| Lead Shape | Gull-wing |
| Pin Count | 48 |
| PCB | 48 |
| Package Length (mm) | 12 |
| Package Width (mm) | 18.4 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 1Mbit |
| Interface Type | Parallel |
| Maximum Operating Current | 20mA |
| Block Organization | Asymmetrical |
| Architecture | Sectored |
| Programming Voltage | 4.5 to 5.5V |
| Timing Type | Asynchronous |
| Maximum Access Time | 120ns |
| Number of Words | 128K/64K |
| Boot Block | Yes |
| Typical Operating Supply Voltage | 5V |
| Address Bus Width | 17/16bit |
| Location of Boot Block | Top |
| Number of Bits per Word | 8/16bit |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | 6Y440 |
| HTS Code | 8542320071 |
| Schedule B | 8542320070 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Micron M29F100T120XN1TR Datasheet
Download the complete datasheet for Micron M29F100T120XN1TR to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.