2M-bit NOR Flash memory with a parallel interface, featuring 256K words x 8 bits organization. This component offers a maximum access time of 90ns and operates from a 3.3V supply. It is housed in a 40-pin TSOP (Thin Small Outline Package) for surface mounting, with a 0.5mm pin pitch. The memory architecture is sectored and asymmetrical, with an 18-bit address bus and a boot block located at the bottom.
PackageTSOP
MountingSurface Mount
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Technical Specifications
Micron M29W002BB90N1T technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSOP |
| Package Description | Thin Small Outline Package |
| Lead Shape | Gull-wing |
| Pin Count | 40 |
| PCB | 40 |
| Package Length (mm) | 10.1(Max) |
| Package Width (mm) | 18.5(Max) |
| Package Height (mm) | 1.05(Max) |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 2Mbit |
| Interface Type | Parallel |
| Maximum Operating Current | 10mA |
| Block Organization | Asymmetrical |
| Architecture | Sectored |
| Programming Voltage | 2.7 to 3.6V |
| Timing Type | Asynchronous |
| Maximum Access Time | 90ns |
| Number of Words | 256K |
| Boot Block | Yes |
| Typical Operating Supply Voltage | 3.3V |
| Address Bus Width | 18bit |
| Location of Boot Block | Bottom |
| Number of Bits per Word | 8bit |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | 6Y440 |
| HTS Code | 8542320071 |
| Schedule B | 8542320070 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Micron M29W002BB90N1T Datasheet
Download the complete datasheet for Micron M29W002BB90N1T to view detailed technical specifications.
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