8M-bit NOR Flash memory, featuring a parallel interface and 1.8V supply voltage. This component offers 512K x 16 words with a maximum access time of 120ns. It utilizes a sectored, asymmetrical block architecture with a boot block located at the bottom. The 48-pin TSOP package is designed for surface mounting with gull-wing leads and a 0.5mm pin pitch.
PackageTSOP
MountingSurface Mount
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Technical Specifications
Micron M59DR008F120N1 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSOP |
| Package Description | Thin Small Outline Package |
| Lead Shape | Gull-wing |
| Pin Count | 48 |
| PCB | 48 |
| Package Length (mm) | 12 |
| Package Width (mm) | 18.4 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 8Mbit |
| Interface Type | Parallel |
| Maximum Operating Current | 20mA |
| Block Organization | Asymmetrical |
| Architecture | Sectored |
| Programming Voltage | 1.65 to 2.2|11.4 to 12.6V |
| Timing Type | Asynchronous |
| Maximum Access Time | 120ns |
| Number of Words | 512K |
| Boot Block | Yes |
| Typical Operating Supply Voltage | 1.8V |
| Address Bus Width | 19bit |
| Location of Boot Block | Bottom |
| Number of Bits per Word | 16bit |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
Compliance
| Cage Code | 6Y440 |
| HTS Code | 8542320071 |
| Schedule B | 8542320070 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Micron M59DR008F120N1 Datasheet
Download the complete datasheet for Micron M59DR008F120N1 to view detailed technical specifications.
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