V55C2256164VBLF8

256Mbit Mobile SDRAM chip, organized as 16Mx16, features a 16-bit data bus and 15-bit address bus. Operating at a maximum clock rate of 125 MHz, this surface-mount component utilizes a 60-pin Fine Pitch Ball Grid Array (FBGA) package. It offers 4 internal banks, each with 4M words, and boasts a maximum access time of 6 ns. Powering this DRAM chip requires a typical operating supply voltage of 2.5V, with a maximum operating current of 90 mA.