1M-bit asynchronous SRAM chip, organized as 128K x 8, featuring a 20ns maximum access time. This surface-mount component operates from a 4.5V to 5.5V supply, with a typical 5V requirement and a maximum operating current of 175mA. Housed in a 32-pin SOJ package with J-leads, it offers a 17-bit address bus and a 1.27mm pin pitch. Designed for a temperature range of -40°C to 85°C, this integrated circuit is suitable for demanding electronic applications.
PackageSOJ
MountingSurface Mount
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Technical Specifications
Pyramid P4C1024-20J4I technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOJ |
| Package/Case | SOJ |
| Package Description | Small Outline Package (J Lead ) |
| Lead Shape | J-Lead |
| Pin Count | 32 |
| PCB | 32 |
| Package Length (mm) | 21.08(Max) |
| Package Width (mm) | 10.29(Max) |
| Package Height (mm) | 3.76(Max) - 0.64(Min) |
| Seated Plane Height (mm) | 3.76(Max) |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Density | 1Mbit |
| Address Bus Width | 17bit |
| Maximum Access Time | 20ns |
| Timing Type | Asynchronous |
| Density in Bits | 1048576bit |
| Maximum Operating Current | 175mA |
| Typical Operating Supply Voltage | 5V |
| Number of Bits per Word | 8bit |
| Number of Ports | 1 |
| Number of Words | 128K |
| Min Operating Supply Voltage | 4.5V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | 3DTT2 |
| EU RoHS | No |
| HTS Code | 8542320041 |
| Schedule B | 8542320040 |
| ECCN | 3A991.b.2.b |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Pyramid P4C1024-20J4I Datasheet
Download the complete datasheet for Pyramid P4C1024-20J4I to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.