128Mbit SDRAM chip, organized as 8Mx16, featuring a 16-bit data bus and 14-bit address bus. Operates at a maximum clock rate of 133 MHz with 4 internal banks, each containing 2M words. Offers a maximum access time of 5.4 ns and a typical operating supply voltage of 3.3V. Packaged in a 54-pin TSOP-II (Thin Small Outline Package Type II) with gull-wing leads for surface mounting.
PackageTSOP-II
MountingSurface Mount
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Technical Specifications
Qimonda HYB 39S128160CT-7.5 technical specifications.
General
Basic Package Type
Lead-Frame SMT
Package Family Name
SOP
Package/Case
TSOP-II
Package Description
Thin Small Outline Package (Type II)
Lead Shape
Gull-wing
Pin Count
54
PCB
54
Package Length (mm)
22.22
Package Width (mm)
10.16
Package Height (mm)
1
Pin Pitch (mm)
0.8
Package Material
Plastic
Mounting
Surface Mount
Density
128Mbit
Type
SDRAM
Organization
8Mx16
Data Bus Width
16bit
Maximum Clock Rate
133MHz
Number of Internal Banks
4
Number of Words per Bank
2M
Maximum Access Time
6|5.4ns
Density in Bits
134217728bit
Address Bus Width
14bit
Maximum Operating Current
100mA
Typical Operating Supply Voltage
3.3V
Max Operating Supply Voltage
3.6V
Min Operating Supply Voltage
3V
Min Operating Temperature
0°C
Max Operating Temperature
70°C
Compliance
EU RoHS
No
HTS Code
8542320002
Schedule B
8542320015
ECCN
EAR99
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Qimonda HYB 39S128160CT-7.5 Datasheet
Download the complete datasheet for Qimonda HYB 39S128160CT-7.5 to view detailed technical specifications.
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