64Mbit SDRAM chip, organized as 8Mx8, featuring an 8-bit data bus and a maximum clock rate of 133 MHz. This DRAM component offers 4 internal banks, each with 2M words, and a maximum access time of 5.4 ns. Housed in a 54-pin TSOP-II package with gull-wing leads for surface mounting, it operates at a typical supply voltage of 3.3V.
PackageTSOP-II
MountingSurface Mount
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Technical Specifications
Qimonda HYB39S64800BT-7.5 technical specifications.
General
Basic Package Type
Lead-Frame SMT
Package Family Name
SOP
Package/Case
TSOP-II
Package Description
Thin Small Outline Package (Type II)
Lead Shape
Gull-wing
Pin Count
54
PCB
54
Package Length (mm)
22.22
Package Width (mm)
10.16
Package Height (mm)
1
Pin Pitch (mm)
0.8
Package Material
Plastic
Mounting
Surface Mount
Density
64Mbit
Type
SDRAM
Organization
8Mx8
Data Bus Width
8bit
Maximum Clock Rate
133MHz
Number of Internal Banks
4
Number of Words per Bank
2M
Maximum Access Time
6|5.4ns
Density in Bits
67108864bit
Address Bus Width
14bit
Maximum Operating Current
120mA
Typical Operating Supply Voltage
3.3V
Max Operating Supply Voltage
3.6V
Min Operating Supply Voltage
3V
Min Operating Temperature
0°C
Max Operating Temperature
70°C
Compliance
EU RoHS
No
HTS Code
8542320002
Schedule B
8542320015
ECCN
EAR99
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Qimonda HYB39S64800BT-7.5 Datasheet
Download the complete datasheet for Qimonda HYB39S64800BT-7.5 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.