24-pin QFN EP Clock Multiplexer with 6 outputs and 2 inputs, supporting 1:4 fanout. Features LVCMOS and LVDS output logic levels, with LVCMOS and Sine Wave input compatibility. Operates from a 2.25V to 2.75V supply, with a maximum input frequency of 13.4 MHz. Surface mountable in a 4mm x 4mm x 0.95mm Quad Flat No Lead package with an exposed pad. Suitable for -40°C to 85°C operating temperatures.
PackageQFN EP
MountingSurface Mount
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Technical Specifications
Renesas 6T39007ANLGI technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | QFN |
| Package/Case | QFN EP |
| Package Description | Quad Flat No Lead Package, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 24 |
| PCB | 24 |
| Package Length (mm) | 4 |
| Package Width (mm) | 4 |
| Package Height (mm) | 0.95(Max) |
| Seated Plane Height (mm) | 1(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-220VGGD-2 |
| Type | Clock Multiplexer |
| Number of Outputs per Chip | 6 |
| Output Logic Level | LVCMOS|LVDS |
| Input Logic Level | LVCMOS|Sine Wave |
| Maximum Input Frequency | 13.4MHz |
| Min Operating Supply Voltage | 2.25V |
| Max Operating Supply Voltage | 2.75V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | SAN34 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Renesas 6T39007ANLGI Datasheet
Download the complete datasheet for Renesas 6T39007ANLGI to view detailed technical specifications.
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