128K-bit asynchronous SRAM chip featuring an 8K x 16 configuration with a maximum access time of 70 ns. This dual-port memory operates with a typical supply voltage of 5V (4.5V to 5.5V range) and supports SDR data rate architecture. Packaged in a 100-pin TQFP (Thin Quad Flat Package) with gull-wing leads for surface mounting, it offers a 0.5mm pin pitch and a 14mm x 14mm footprint. Operating across a wide temperature range of -55°C to 125°C, this component is designed for demanding applications.
PackageTQFP
MountingSurface Mount
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Technical Specifications
Renesas 7025L70PFGB8 technical specifications.
General
Basic Package Type
Lead-Frame SMT
Package Family Name
QFP
Package/Case
TQFP
Package Description
Thin Quad Flat Package
Lead Shape
Gull-wing
Pin Count
100
PCB
100
Package Length (mm)
14
Package Width (mm)
14
Package Height (mm)
1.4
Seated Plane Height (mm)
1.6(Max)
Pin Pitch (mm)
0.5
Package Material
Plastic
Mounting
Surface Mount
Jedec
MS-026BED
Density
128Kbit
Address Bus Width
26bit
Maximum Access Time
70ns
Timing Type
Asynchronous
Data Rate Architecture
SDR
Density in Bits
131072bit
Maximum Operating Current
250mA
Typical Operating Supply Voltage
5V
Number of Bits per Word
16bit
Number of Ports
2
Number of Words
8K
Min Operating Supply Voltage
4.5V
Max Operating Supply Voltage
5.5V
Min Operating Temperature
-55°C
Max Operating Temperature
125°C
Compliance
Cage Code
SAN34
EU RoHS
Yes
HTS Code
8542320041
Schedule B
8542320040
ECCN
3A001.a.2.c
Automotive
No
AEC Qualified
No
PPAP
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Renesas 7025L70PFGB8 Datasheet
Download the complete datasheet for Renesas 7025L70PFGB8 to view detailed technical specifications.
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