128K-bit asynchronous SRAM chip with 8K x 16 organization, featuring a 20ns maximum access time. This dual-port memory operates at a 5V supply voltage (4.5V to 5.5V range) and supports SDR data rate architecture. Packaged in a 100-pin TQFP (Thin Quad Flat Package) with gull-wing leads for surface mounting, it measures 14x14x1.4mm with a 0.5mm pin pitch. Operating temperature range is -55°C to 125°C.
PackageTQFP
MountingSurface Mount
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Technical Specifications
Renesas 7025S20PFGB8 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | TQFP |
| Package Description | Thin Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 14 |
| Package Width (mm) | 14 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BED |
| Density | 128Kbit |
| Address Bus Width | 26bit |
| Maximum Access Time | 20ns |
| Timing Type | Asynchronous |
| Data Rate Architecture | SDR |
| Density in Bits | 131072bit |
| Maximum Operating Current | 370mA |
| Typical Operating Supply Voltage | 5V |
| Number of Bits per Word | 16bit |
| Number of Ports | 2 |
| Number of Words | 8K |
| Min Operating Supply Voltage | 4.5V |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 125°C |
Compliance
| Cage Code | SAN34 |
| EU RoHS | Yes |
| HTS Code | 8542320041 |
| Schedule B | 8542320040 |
| ECCN | 3A001.a.2.c |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Renesas 7025S20PFGB8 Datasheet
Download the complete datasheet for Renesas 7025S20PFGB8 to view detailed technical specifications.
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