
64K-bit asynchronous SRAM chip featuring 8K x 8 organization and 20ns maximum access time. This surface-mount component utilizes a 64-pin Thin Quad Flat Package (TQFP) with a 0.8mm pin pitch. It operates with a 3.3V supply voltage and supports a 26-bit address bus. The dual-port architecture and SDR data rate make it suitable for various embedded applications.
Renesas 70V05S20PFI8 technical specifications.
Download the complete datasheet for Renesas 70V05S20PFI8 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.