The 9DB633AFLF is a clock driver IC with one input and six outputs, supporting HCSL input and output logic levels. It operates at frequencies between 33 and 110 MHz, with a maximum cycle-to-cycle jitter of 50 ps and a maximum duty cycle of 55%. The device is designed to work within a temperature range of 0 to 70°C and is packaged in a 28-pin SSOP package.
PackageSSOP
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Technical Specifications
Renesas 9DB633AFLF technical specifications.
General
| Type | Clock Driver |
| Number of Inputs | 1 |
| Number of Outputs | 6 |
| Input Signal Type | Differential |
| Output Signal Type | Differential |
| Input Logic Level | HCSL |
| Output Logic Level | HCSL |
| Minimum Input Frequency | 33MHz |
| Maximum Input Frequency | 110MHz |
| Maximum Cycle to Cycle Jitter | 50ps |
| Maximum Duty Cycle | 55% |
| Maximum Fall Time | 5ns |
| Maximum Rise Time | 5ns |
| Maximum Output Skew | 50ps |
| Spread Spectrum | Yes |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 70°C |
| Pin Count | 28 |
| Package/Case | SSOP |
| Package Family Name | SOP |
Compliance
| RoHS | Yes |
| RoHS Version | 2011/65/EU, 2015/863 |
Datasheet
Renesas 9DB633AFLF Datasheet
Download the complete datasheet for Renesas 9DB633AFLF to view detailed technical specifications.
No datasheet is available for this part.