32-bit RISC microcontroller featuring a ROMLess architecture and a 100 MHz maximum CPU frequency. This surface-mount device utilizes a 208-pin Thin Fine Pitch Ball Grid Array (TFBGA) package with a 0.65mm pin pitch, measuring 12x12x0.84mm. It offers 112 programmable I/Os, 8 timers, and SCI/USB interface capabilities, including a single USB port. Four ADC channels are available for analog-to-digital conversion.
PackageTFBGA
MountingSurface Mount
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Technical Specifications
Renesas HD6417705BP100V technical specifications.
General
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | TFBGA |
| Package Description | Thin Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 208 |
| PCB | 208 |
| Package Length (mm) | 12 |
| Package Width (mm) | 12 |
| Package Height (mm) | 0.84(Max) |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | SuperH |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum CPU Frequency | 100MHz |
| Program Memory Type | ROMLess |
| Number of Programmable I/Os | 112 |
| Programmability | No |
| Number of Timers | 8 |
| Interface Type | SCI/USB |
| CAN | 0 |
| I2C | 0 |
| SPI | 0 |
| Ethernet | 0 |
| UART | 0 |
| USART | 0 |
| USB | 1 |
| I2S | 0 |
| ADC Channels | 4 |
| Number of ADCs | Single |
Compliance
| Cage Code | SAN34 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
Datasheet
Renesas HD6417705BP100V Datasheet
Download the complete datasheet for Renesas HD6417705BP100V to view detailed technical specifications.
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