Dual negative edge-triggered J-K flip-flop with complementary outputs. This CMOS logic IC features two independent flip-flops, operating from a 2V to 6V supply range with a nominal voltage of 4.5V. It offers a propagation delay of 190ns and is housed in a 14-pin SOP (Small Outline Package) with gull-wing terminals. The component is designed for industrial temperature grades, with an operating range of -40°C to 85°C.
Renesas HD74HC113FP technical specifications.
| Clock Edge Trigger Type | Negative Edge |
| Height - Seated (Max) | 2.2mm |
| JESD-30 Code | R-PDSO-G14 |
| JESD-609 Code | e0 |
| Length | 10.06mm |
| Logic IC Type | J-K FLIP-FLOP |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | Complementary |
| Package Body Material | Plastic |
| Package Code | SOP |
| Package Shape | Rectangular |
| Package Style | SMALL OUTLINEMeter |
| Propagation Delay (tpd) | 190ns |
| Qualification Status | Not Qualified |
| RoHS Compliant | No |
| Supply Voltage-Max (Vsup) | 6V |
| Supply Voltage-Min (Vsup) | 2V |
| Supply Voltage-Nom (Vsup) | 4.5V |
| Surface Mount | Yes |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Tin |
| Terminal Form | Gull Wing |
| Terminal Pitch | 1.27mm |
| Terminal Position | DUAL |
| Width | 5.5mm |
| RoHS | Not Compliant |
Download the complete datasheet for Renesas HD74HC113FP to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.