Negative edge-triggered J-K flip-flop with complementary outputs, operating at a maximum frequency of 30MHz. This TTL logic IC features two bits and a single function, requiring a 5V power supply with a maximum current draw of 8mA. Housed in a 14-pin PDIP package with through-hole mounting and a 2.54mm terminal pitch, it offers a propagation delay of 30ns and operates within a temperature range of -20°C to 75°C.
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Technical Specifications
Renesas HD74LS114P technical specifications.
General
| Clock Edge Trigger Type | Negative Edge |
| fmax-Min | 30MHz |
| Height - Seated (Max) | 5.06mm |
| JESD-30 Code | R-PDIP-T14 |
| JESD-609 Code | e0 |
| Length | 19.2mm |
| Logic IC Type | J-K FLIP-FLOP |
| Max Frequency@Nom-Sup | 30MHz |
| Max I(ol) | 8A |
| Max Operating Temperature | 75°C |
| Min Operating Temperature | -20°C |
| Number of Bits | 2 |
| Number of Functions | 1 |
| Output Polarity | Complementary |
| Package Body Material | Plastic |
| Package Code | DIP |
| Package Equivalence Code | DIP14,.3 |
| Package Shape | Rectangular |
| Package Style | IN-LINEMeter |
| Power Supplies | 5V |
| Power Supply Current-Max (ICC) | 8mA |
| Propagation Delay (tpd) | 30ns |
| Qualification Status | Not Qualified |
| RoHS Compliant | No |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | No |
| Technology | TTL |
| Temperature Grade | COMMERCIAL EXTENDED |
| Terminal Finish | Tin |
| Terminal Form | Through Hole |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Width | 7.62mm |
Compliance
| RoHS | Not Compliant |
Datasheet
Renesas HD74LS114P Datasheet
Download the complete datasheet for Renesas HD74LS114P to view detailed technical specifications.
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