Dual D-latch with true output, operating on a 5V supply. Features high-level clock edge triggering and a propagation delay of 19ns. This TTL technology component is housed in a 14-pin PDIP package with through-hole terminals. Maximum operating temperature is 75°C, with a minimum of -20°C.
Renesas HD74LS77P technical specifications.
| Clock Edge Trigger Type | HIGH LEVEL |
| Height - Seated (Max) | 5.06mm |
| JESD-30 Code | R-PDIP-T14 |
| Length | 19.2mm |
| Logic IC Type | D LATCH |
| Max I(ol) | 8A |
| Max Operating Temperature | 75°C |
| Min Operating Temperature | -20°C |
| Number of Bits | 2 |
| Number of Functions | 2 |
| Output Polarity | True |
| Package Body Material | Plastic |
| Package Code | DIP |
| Package Equivalence Code | DIP14,.3 |
| Package Shape | Rectangular |
| Package Style | IN-LINEMeter |
| Power Supply Current-Max (ICC) | 13mA |
| Prop. Delay@Nom-Sup | 19ns |
| Propagation Delay (tpd) | 19ns |
| Qualification Status | Not Qualified |
| Reach SVHC Compliant | Yes |
| Supply Voltage-Nom (Vsup) | 5V |
| Surface Mount | No |
| Technology | TTL |
| Temperature Grade | COMMERCIAL EXTENDED |
| Terminal Form | Through Hole |
| Terminal Pitch | 2.54mm |
| Terminal Position | DUAL |
| Width | 7.62mm |
| RoHS | Not Compliant |
Download the complete datasheet for Renesas HD74LS77P to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.