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Technical Specifications
Renesas HD74LV20AFPEL technical specifications.
General
| Max Operating Temperature | 85 |
| Number of Terminals | 14 |
| Min Operating Temperature | -40 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDSO-G14 |
| Width | 5.5 |
| Length | 10.06 |
| Pin Count | 14 |
| Number of Functions | 2 |
| Temperature Grade | INDUSTRIAL |
| Supply Voltage-Nom (Vsup) | 2.5 |
| Supply Voltage-Max (Vsup) | 5.5 |
| Supply Voltage-Min (Vsup) | 2 |
| Logic IC Type | NAND GATE |
| Family | LV/LV-A/LVX/H |
| Propagation Delay (tpd) | 18.5 |
| Max I(ol) | 0.006 |
| Prop. Delay@Nom-Sup | 11.5 |
| Load Capacitance | 50 |
| Number of Inputs | 4 |
| Schmitt Trigger | NO |
Compliance
| RoHS | No |
| Lead Free | No |
| HTS Code | 8542.39.00.01 |
| REACH | unknown |
| Military Spec | False |
Datasheet
Renesas HD74LV20AFPEL Datasheet
Download the complete datasheet for Renesas HD74LV20AFPEL to view detailed technical specifications.
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