Dual D Flip-Flop, CMOS technology, featuring positive edge triggering and complementary outputs. Operates with a nominal supply voltage of 2.5V, supporting a range of 2V to 5.5V. Achieves a maximum frequency of 45MHz at nominal supply, with a minimum fmax of 110MHz. Packaged in a 14-pin TSSOP (Thin Shrink Small Outline Package) with a 0.65mm terminal pitch, measuring 5mm in length and 4.4mm in width, with a seated height of 1.1mm. Suitable for industrial temperature grades, from -40°C to 85°C.
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Technical Specifications
Renesas HD74LV74ATELL technical specifications.
General
| Clock Edge Trigger Type | Positive Edge |
| fmax-Min | 110MHz |
| Height - Seated (Max) | 1.1mm |
| JESD-30 Code | R-PDSO-G14 |
| JESD-609 Code | e0 |
| Length | 5mm |
| Load Capacitance | 50pF |
| Logic IC Type | D FLIP-FLOP |
| Max Frequency@Nom-Sup | 45MHz |
| Max I(ol) | 6A |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| Number of Bits | 1 |
| Number of Functions | 2 |
| Output Polarity | Complementary |
| Package Body Material | Plastic |
| Package Code | TSSOP |
| Package Equivalence Code | TSSOP14,.25 |
| Package Shape | Rectangular |
| Package Style | SMALL OUTLINE, THIN PROFILE, SHRINK PITCHMeter |
| Packaging | Tape and Reel |
| Power Supplies | 3.3V |
| Prop. Delay@Nom-Sup | 17.5ns |
| Propagation Delay (tpd) | 23ns |
| Qualification Status | Not Qualified |
| RoHS Compliant | No |
| Supply Voltage-Max (Vsup) | 5.5V |
| Supply Voltage-Min (Vsup) | 2V |
| Supply Voltage-Nom (Vsup) | 2.5V |
| Surface Mount | Yes |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | Tin |
| Terminal Form | Gull Wing |
| Terminal Pitch | 0.65mm |
| Terminal Position | DUAL |
| Width | 4.4mm |
Compliance
| RoHS | Not Compliant |
Datasheet
Renesas HD74LV74ATELL Datasheet
Download the complete datasheet for Renesas HD74LV74ATELL to view detailed technical specifications.
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