16-bit CISC microcontroller featuring a 24 MHz M16C/60 core with 256KB ROM and 20KB RAM. This surface-mount device is housed in a 100-pin LQFP package with a 0.5mm pin pitch, supporting 3.3V/5V operation. It offers 87 programmable I/Os, 11 timers, 3 UART interfaces, and 26 ADC channels with 2 x 8-bit DACs. Operating temperature range is -40°C to 85°C.
PackageLQFP
MountingSurface Mount
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Technical Specifications
Renesas M30624MGP-255GP#U3 technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | LQFP |
| Package Description | Low Profile Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 14 |
| Package Width (mm) | 14 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.7(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Weight (g) | 0.6 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BED |
| Family Name | M16C |
| Data Bus Width | 16bit |
| Instruction Set Architecture | CISC |
| Maximum Clock Rate | 24MHz |
| Maximum CPU Frequency | 24MHz |
| Device Core | M16C/60 |
| Program Memory Type | ROM |
| Program Memory Size | 256KB |
| RAM Size | 20KB |
| Number of Programmable I/Os | 87 |
| Programmability | Yes |
| Number of Timers | 11 |
| Interface Type | UART |
| CAN | 0 |
| I2C | 0 |
| SPI | 0 |
| Ethernet | 0 |
| UART | 3 |
| USART | 0 |
| USB | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| ADC Channels | 26 |
| Number of ADCs | Single |
| DAC Channels | 2 |
| DAC Resolution | 8bit |
| Number of DACs | Single |
Compliance
| Cage Code | SAN34 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| Automotive | Yes |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Renesas M30624MGP-255GP#U3 Datasheet
Download the complete datasheet for Renesas M30624MGP-255GP#U3 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.