Synchronous SRAM chip, 36M-bit density, featuring a 2M x 18 configuration with a 2-port architecture. Offers a maximum access time of 0.45 ns and a maximum clock rate of 200 MHz, utilizing QDR data rate architecture. Operates at a typical supply voltage of 1.8V, with a voltage range of 1.7V to 1.9V. Packaged in a 165-pin FBGA (Fine Pitch Ball Grid Array) with dimensions of 17mm x 15mm x 1.08mm, suitable for surface mount applications.
Renesas R1Q2A3618BBG-50RT technical specifications.
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