Synchronous SRAM chip, 36M-bit density, featuring a 2M x 18 configuration with QDR architecture. Delivers a maximum access time of 0.5 ns and a maximum clock rate of 167 MHz. Operates at a typical supply voltage of 1.8V, with a voltage range of 1.7V to 1.9V. Encased in a 165-pin Fine Pitch Ball Grid Array (FBGA) package, measuring 17mm x 15mm x 1.08mm, designed for surface mounting.
Renesas R1Q2A3618BBG-60RT technical specifications.
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