Synchronous SRAM chip offering 36M-bit density with a 1M x 36 configuration. Features a 0.45ns maximum access time and operates at a maximum clock rate of 200MHz with QDR architecture. This surface-mount component utilizes a 165-pin Fine Pitch Ball Grid Array (FBGA) package measuring 17mm x 15mm x 1.08mm. It operates with a typical supply voltage of 1.8V and supports a dual-port interface.
Renesas R1Q2A3636BBG-50RS technical specifications.
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