32-bit RISC microcontroller featuring a SH-2A core, operating at up to 100 MHz. This MCU offers 128KB of Flash program memory and 8KB of RAM. It includes 71 programmable I/Os and three timers, with dual ADCs providing 8 channels each. The device is housed in a 100-pin LFQFP surface-mount package with a 0.5mm pin pitch. Operating voltage ranges from 3.3V to 5.5V, with an operating temperature range of -40°C to 85°C.
PackageLFQFP
MountingSurface Mount
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Technical Specifications
Renesas R5F72433D100FPV technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | LFQFP |
| Package Description | Low Profile Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 14 |
| Package Width (mm) | 14 |
| Package Height (mm) | 1.4 |
| Seated Plane Height (mm) | 1.6(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MS-026BED |
| Family Name | SuperH |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 100MHz |
| Maximum CPU Frequency | 100MHz |
| Device Core | SH-2A |
| Program Memory Type | Flash |
| Program Memory Size | 128KB |
| RAM Size | 8KB |
| Number of Programmable I/Os | 71 |
| Programmability | Yes |
| Number of Timers | 3 |
| Interface Type | SCI |
| CAN | 0 |
| I2C | 0 |
| SPI | 0 |
| Ethernet | 0 |
| UART | 0 |
| USART | 0 |
| USB | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| ADC Channels | 8/8 |
| Number of ADCs | Dual |
Compliance
| Cage Code | SAN34 |
| EU RoHS | Yes |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2002/95/EC |
Datasheet
Renesas R5F72433D100FPV Datasheet
Download the complete datasheet for Renesas R5F72433D100FPV to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.