N-channel enhancement mode power MOSFET, silicon, 30V drain-source voltage, 30A continuous drain current. Features 5.5mΩ maximum drain-source resistance at 8V Vgs, 23.6nC typical gate charge at 4.5V Vgs, and 2950pF typical input capacitance at 10V Vds. Single element per chip, configured as Quad Drain Triple Source. Packaged in an 8-pin HWSON EP (SON family) surface-mount plastic package with no leads, measuring 3.1mm x 2.9mm x 0.8mm(Max).
PackageHWSON EP
MountingSurface Mount
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Technical Specifications
Renesas RJK03K8DNS-00-J5 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | SON |
| Package/Case | HWSON EP |
| Lead Shape | No Lead |
| Pin Count | 8 |
| PCB | 8 |
| Package Length (mm) | 3.1 |
| Package Width (mm) | 2.9 |
| Package Height (mm) | 0.8(Max) |
| Seated Plane Height (mm) | 0.8(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Weight (g) | 0.022 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Configuration | Single Quad Drain Triple Source |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 1 |
| Maximum Drain Source Voltage | 30V |
| Maximum Gate Source Voltage | ±12V |
| Maximum Continuous Drain Current | 30A |
| Material | Si |
| Maximum Drain Source Resistance | 5.5@8VmOhm |
| Typical Gate Charge @ Vgs | [email protected]nC |
| Typical Input Capacitance @ Vds | 2950@10VpF |
| Maximum Power Dissipation | 20000mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | SAN34 |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
Datasheet
Renesas RJK03K8DNS-00-J5 Datasheet
Download the complete datasheet for Renesas RJK03K8DNS-00-J5 to view detailed technical specifications.
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