The 100K family logic IC is a parity generator/checker with 9-bit output polarity and a propagation delay of 2.8 units. It operates within a temperature range of 0 to 85°C and has a JEDEC package code of R-PDIP-T24. The device has 24 terminals and is available in a DIP package. It is a member of the Arithmetic & Logic Units (ALU) category and is suitable for use in a variety of applications.
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Technical Specifications
Rochester Electronics 100360PC technical specifications.
General
| Max Operating Temperature | 85 |
| Number of Terminals | 24 |
| Min Operating Temperature | 0 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDIP-T24 |
| Width | 10.16 |
| Length | 30.585 |
| Number of Functions | 2 |
| Temperature Grade | OTHER |
| Logic IC Type | PARITY GENERATOR/CHECKER |
| Family | 100K |
| Propagation Delay (tpd) | 2.8 |
| Number of Bits | 9 |
| Output Polarity | TRUE |
Compliance
| HTS Code | 8542.39.00.01 |
| REACH | unknown |
| Military Spec | False |
Datasheet
Rochester Electronics 100360PC Datasheet
Download the complete datasheet for Rochester Electronics 100360PC to view detailed technical specifications.
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