Dual J-K Negative-Edge-Triggered Flip-Flops With Clear 14-PDIP -40 to 85
Quadruple 2-Input NAND Gates with Open-Drain Outputs 14-PDIP -40 to 85
3-Input NOR Gate IC, 3-Ch, 2-6V, 15ns, PDIP
3-Input AND Gate IC, 3-Ch, 2-6V, 17ns, PDIP
Dual D-Type Flip-Flop, 29MHz, 5V, SOIC, CMOS
6-Ch Schmitt Trigger Inverter IC, 2-6V, 21ns, SOIC
4-Ch 2-Input OR Gate IC, 2-6V, 21ns, SOIC
6-Element CMOS Inverter IC, 16ns, 5.2mA, 2-6V, SOIC
3-Input NOR Gate IC, 3-Circuit, 2V-6V, 74HC, SOIC
6-Ch CMOS Inverter IC, 2-6V, Open-Drain, SOIC
4-Bit Bistable Latches 16-SOIC -40 to 85
D-Type Flip-Flop, 2-Element, 60MHz, PDIP, CMOS
4-Element 2-IN CMOS NAND Gate IC, 5V, PDIP
4-Element 2-IN NOR Gate IC, CMOS, 5V, SOIC
Schmitt Trigger Inverter IC, 6-Element CMOS, PDIP
Dual J-K Negative-Edge-Triggered Flip-Flops With Clear 14-SOIC -40 to 85
IC,LATCH,SINGLE,4-BIT,HC-CMOS,DIP,14PIN,PLASTIC
Flip-Flop; Quad D Type Flip-Flop; 5 V (Nom.); 5 V (Nom.); 5 V (Nom.); SOIC
Nor Gate; Quadruple 2-INPUT Positive-nor Gates; 5 V; 5.5 V (max.); Vcc V (max.)
6-Element CMOS Inverter IC, 5V, PDIP, Through Hole
