FPGA Development Kit featuring an EP3C16F484 FPGA. Operates at a maximum clock frequency of 50 MHz, equipped with 8MB of RAM and 4MB of NOR Flash program memory. Includes 1 USB, 1 RS232, and 1 SPI interface. Supports 7-Segment/LCD display output and Nios II/Quartus II IDE. Features JTAG support, 10 LEDs, and 13 push buttons/switches for extensive prototyping capabilities.
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Technical Specifications
Terasic P0037 technical specifications.
General
| Type | Development Kit |
| Supported Device | EP3C16F484 |
| Supported Device Technology | FPGA |
| Maximum Clock Frequency | 50MHz |
| RAM Size | 8MB |
| Program Memory Size | 4MB |
| Program Memory Type | NOR Flash |
| Main Program Memory Type | Flash |
| USB | 1 |
| RS232 | 1 |
| SPI | 1 |
| Display Type | 7-Segment/LCD |
| IDE | Nios II/Quartus II |
| JTAG Support | Yes |
| Number of LEDs | 10 |
| Audio Interfaces | No |
| Push Buttons and Switches | 13 |
Compliance
| RoHS | Yes |
| RoHS Version | 2011/65/EU |
Datasheet
Terasic P0037 Datasheet
Download the complete datasheet for Terasic P0037 to view detailed technical specifications.
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