Texas Instruments
74ACT11109DR
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear and Preset 16-SOIC -40 to 85
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Technical Specifications
Texas Instruments 74ACT11109DR technical specifications.
General
| Max Operating Temperature | 85 |
| Number of Terminals | 16 |
| Min Operating Temperature | -40 |
| Terminal Position | DUAL |
| JEDEC Package Code | R-PDSO-G16 |
| Width | 3.9 |
| Length | 9.9 |
| Number of Functions | 2 |
| Temperature Grade | INDUSTRIAL |
| Supply Voltage-Nom (Vsup) | 5 |
| Supply Voltage-Max (Vsup) | 5.5 |
| Supply Voltage-Min (Vsup) | 4.5 |
| Logic IC Type | J-KBAR FLIP-FLOP |
| Family | ACT |
| Propagation Delay (tpd) | 8.3 |
| Number of Bits | 2 |
| Max I(ol) | 0.024 |
| Load Capacitance | 50 |
| Output Polarity | COMPLEMENTARY |
| Trigger Type | POSITIVE EDGE |
| fmax-Min | 100 |
| Max Frequency@Nom-Sup | 100000000 |
Compliance
| RoHS | No |
| Lead Free | No |
| HTS Code | 8542.39.00.01 |
| REACH | not_compliant |
| Military Spec | False |
Datasheet
Texas Instruments 74ACT11109DR Datasheet
Download the complete datasheet for Texas Instruments 74ACT11109DR to view detailed technical specifications.
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