CD4027BF3A

Dual J-K Flip-Flop, CMOS, 24MHz, 18V, CDIP

CMOS Dual J-K Master-Slave Flip-Flop featuring positive edge clock triggering. This integrated circuit offers two independent flip-flop elements, each with a maximum operating frequency of 24MHz. It operates across a supply voltage range of 3V to 18V and supports through-hole mounting in a CDIP package with tin-lead contact plating. Key electrical characteristics include a quiescent current of 20uA, a high-level output current of -4.2mA, and a low-level output current of 4.2mA, with a propagation delay of 400ns.

Frequency24MHz

PackageCDIP

MountingThrough Hole

PolarityNon-Inverting

Quick Jump:

Technical Specifications

Texas Instruments CD4027BF3A technical specifications.

General

Package/Case	CDIP
Clock Edge Trigger Type	Positive Edge
Contact Plating	Tin, Lead
Frequency	24MHz
High Level Output Current	-4.2mA
Lead Free	Contains Lead
Low Level Output Current	4.2mA
Max Frequency	24MHz
Max Operating Temperature	125°C
Min Operating Temperature	-55°C
Max Supply Voltage	18V
Min Supply Voltage	3V
Mount	Through Hole
Number of Bits	2
Number of Elements	2
Output Type	TTL
Packaging	Rail/Tube
Polarity	Non-Inverting
Propagation Delay	400ns
Quiescent Current	20uA
Radiation Hardening	No
RoHS Compliant	No
Technology	CMOS
Turn-On Delay Time	400ns