Dual positive-edge-triggered J-K flip-flops with set and reset functionality. Features a maximum operating frequency of 100MHz and a propagation delay of 10.3ns. Operates with a supply voltage range of 1.5V to 5.5V and offers output currents of 24mA (low level) and -24mA (high level). This CMOS logic IC is housed in a 16-SOIC surface mount package and is RoHS compliant.
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| Package/Case | SOIC |
| Clock Edge Trigger Type | Positive Edge |
| Frequency | 100MHz |
| High Level Output Current | -24mA |
| Input Type | SINGLE-ENDED |
| Lead Free | Lead Free |
| Logic Function | Flip-Flop, JK-Type |
| Low Level Output Current | 24mA |
| Max Frequency | 100MHz |
| Max Operating Temperature | 125°C |
| Min Operating Temperature | -55°C |
| Max Supply Voltage | 5.5V |
| Min Supply Voltage | 1.5V |
| Mount | Surface Mount |
| Number of Bits | 2 |
| Number of Bits per Element | 1 |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Number of Input Lines | 2 |
| Number of Output Lines | 1 |
| Output Current | 24mA |
| Package Quantity | 1 |
| Packaging | Tape and Reel |
| Polarity | Non-Inverting |
| Propagation Delay | 10.3ns |
| Radiation Hardening | No |
| Reach SVHC Compliant | No |
| RoHS Compliant | Yes |
| Series | 74AC |
| Technology | CMOS |
| Turn-On Delay Time | 2.6ns |
| Weight | 0.004998oz |
| RoHS | Compliant |
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