Dual negative-edge-triggered J-K flip-flops with set and reset functionality. Features 2 independent J-K flip-flop circuits, each with a single-ended input and non-inverting output. Operates with a maximum supply voltage of 6V and a minimum of 2V, supporting a frequency up to 60MHz. CMOS technology ensures low quiescent current of 4uA. Packaged in a 16-SO surface mount configuration with gold contact plating, suitable for operation between -55°C and 125°C.
Frequency60MHz
PackageSOP
MountingSurface Mount
PolarityNon-Inverting
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Technical Specifications
Texas Instruments CD74HC112NSR technical specifications.
General
Package/Case
SOP
Clock Edge Trigger Type
Negative Edge
Contact Plating
Gold
Frequency
60MHz
High Level Output Current
-5.2mA
Input Type
SINGLE-ENDED
Lead Free
Lead Free
Logic Function
Flip-Flop, JK-Type
Low Level Output Current
5.2mA
Max Operating Temperature
125°C
Min Operating Temperature
-55°C
Max Supply Voltage
6V
Min Supply Voltage
2V
Mount
Surface Mount
Number of Bits
2
Number of Bits per Element
1
Number of Circuits
2
Number of Elements
2
Number of Input Lines
2
Number of Output Lines
1
Output Current
5.2mA
Package Quantity
1
Packaging
Tape and Reel
Polarity
Non-Inverting
Propagation Delay
175ns
Quiescent Current
4uA
RoHS Compliant
Yes
Series
74HC
Technology
CMOS
Turn-On Delay Time
14ns
Weight
0.007079oz
Compliance
RoHS
Compliant
Datasheet
Texas Instruments CD74HC112NSR Datasheet
Download the complete datasheet for Texas Instruments CD74HC112NSR to view detailed technical specifications.
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