32-bit ARM Cortex M3 RISC microcontroller featuring an 80 MHz maximum clock rate and 256KB of Flash program memory. This surface-mount device offers 48KB of RAM, 67 programmable I/Os, and dual ADCs with 16 channels each. It supports I2C, SPI, SSI, and UART interfaces and operates with a supply voltage range of 1.32V to 3.6V. The microcontroller is housed in a 48-pin QFN EP package with a 0.5mm pin pitch, measuring 7mm x 7mm x 0.95mm.
PackageQFN EP
MountingSurface Mount
Quick Jump:
Technical Specifications
Texas Instruments LM3S5R31-IGZ80-C0 technical specifications.
General
| Basic Package Type | Non-Lead-Frame SMT |
| Package Family Name | QFN |
| Package/Case | QFN EP |
| Package Description | Quad Flat No Lead Package, Exposed Pad |
| Lead Shape | No Lead |
| Pin Count | 48 |
| PCB | 48 |
| Package Length (mm) | 7(Max) |
| Package Width (mm) | 7(Max) |
| Package Height (mm) | 0.95(Max) |
| Seated Plane Height (mm) | 1(Max) |
| Pin Pitch (mm) | 0.5 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-220 |
| Family Name | Stellaris |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 80MHz |
| Maximum CPU Frequency | 80MHz |
| Device Core | ARM Cortex M3 |
| Program Memory Type | Flash |
| Program Memory Size | 256KB |
| RAM Size | 48KB |
| Number of Programmable I/Os | 67 |
| Core Architecture | ARM |
| Programmability | Yes |
| Number of Timers | 4 |
| Interface Type | I2C/SPI/SSI/UART |
| Max Operating Supply Voltage | 1.32|3.6V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| ADC Channels | 16/16 |
| Number of ADCs | Dual |
Compliance
| Cage Code | 01295 |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU |
Datasheet
Texas Instruments LM3S5R31-IGZ80-C0 Datasheet
Download the complete datasheet for Texas Instruments LM3S5R31-IGZ80-C0 to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.