Dual J-K Flip-Flops with Clear, designed for logic applications. This integrated circuit features two independent J-K flip-flop elements, each with a single bit capacity. Operates on a negative edge clock trigger, supporting a maximum frequency of 45MHz. Offers a low-level output current of 8mA and a high-level output current of -400uA, with TTL output type. Packaged in a 14-SOIC surface mount configuration, suitable for operation between 0°C and 70°C.
Frequency45MHz
PackageSOIC
MountingSurface Mount
PolarityNon-Inverting
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Technical Specifications
Texas Instruments SN74LS107ADRE4 technical specifications.
General
| Package/Case | SOIC |
| Clock Edge Trigger Type | Negative Edge |
| Frequency | 45MHz |
| High Level Output Current | -400uA |
| Lead Free | Contains Lead |
| Logic Function | Flip-Flop |
| Low Level Output Current | 8mA |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Mount | Surface Mount |
| Number of Bits | 2 |
| Number of Bits per Element | 1 |
| Number of Circuits | 2 |
| Number of Elements | 2 |
| Number of Input Lines | 4 |
| Number of Output Lines | 2 |
| Output Current | 8mA |
| Output Type | TTL |
| Package Quantity | 2500 |
| Packaging | Tape and Reel |
| Polarity | Non-Inverting |
| Propagation Delay | 20ns |
| RoHS Compliant | Yes |
| Series | 74LS |
| Turn-On Delay Time | 15ns |
| Weight | 0.004564oz |
Compliance
| RoHS | Compliant |
Datasheet
Texas Instruments SN74LS107ADRE4 Datasheet
Download the complete datasheet for Texas Instruments SN74LS107ADRE4 to view detailed technical specifications.
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