2SJ507(TMEIC)

P-CH MOSFET, 60V, 1A, Si, TO-92

P-channel enhancement mode power MOSFET featuring a 60V maximum drain-source voltage and 1A continuous drain current. This single-element silicon transistor is housed in a 3-pin TO-92 plastic through-hole package with a maximum package length of 5.1mm, width of 4.1mm, and height of 4.7mm. Key electrical characteristics include a maximum drain-source on-resistance of 700mΩ at 10V, typical gate charge of 5.6nC at 10V, and typical input capacitance of 170pF at 10V. Maximum power dissipation is 900mW, with an operating temperature range from -55°C to 150°C.

PackageTO-92

MountingThrough Hole

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Technical Specifications

Toshiba 2SJ507(TMEIC) technical specifications.

General

Basic Package Type	Through Hole
Package Family Name	TO-92
Package/Case	TO-92
Package Description	Plastic Header Style Package
Pin Count	3
PCB	3
Package Length (mm)	5.1(Max)
Package Width (mm)	4.1(Max)
Package Height (mm)	4.7(Max)
Seated Plane Height (mm)	4.7(Max) + 1.8
Package Material	Plastic
Mounting	Through Hole
Jedec	TO-92
Configuration	Single
Category	Power MOSFET
Channel Mode	Enhancement
Channel Type	P
Number of Elements per Chip	1
Maximum Drain Source Voltage	60V
Maximum Gate Source Voltage	±20V
Maximum Continuous Drain Current	1A
Material	Si
Maximum Drain Source Resistance	700@10VmOhm
Typical Gate Charge @ Vgs	5.6@10VnC
Typical Gate Charge @ 10V	5.6nC
Typical Input Capacitance @ Vds	170@10VpF
Maximum Power Dissipation	900mW
Min Operating Temperature	-55°C
Max Operating Temperature	150°C

Compliance

Cage Code	S0562
HTS Code	8541210095
Schedule B	8541210080
ECCN	EAR99
Automotive	No
AEC Qualified	No
PPAP	No
Radiation Hardening	No

Datasheet

This datasheet cannot be embedded due to technical restrictions.

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2SJ507(TMEIC)

2SJ507(TMEIC)

P-CH MOSFET, 60V, 1A, Si, TO-92

Technical Specifications

General

Compliance

Datasheet

Toshiba 2SJ507(TMEIC) Datasheet