P-channel enhancement mode silicon power MOSFET featuring a 50V drain-source voltage and 5A continuous drain current. This single-element transistor is housed in a 3-pin TO-92 Mod plastic package with through-hole mounting. Key specifications include a maximum drain-source on-resistance of 190 mOhm at 10V, typical gate charge of 18 nC, and typical input capacitance of 470 pF. Maximum power dissipation is 900 mW, with an operating temperature range of -55°C to 150°C.
Toshiba 2SJ537(T6MDNSI) technical specifications.
| Basic Package Type | Through Hole |
| Package Family Name | TO-92 |
| Package/Case | TO-92 Mod |
| Package Description | Plastic Header Style Package |
| Lead Shape | Through Hole |
| Pin Count | 3 |
| PCB | 3 |
| Package Length (mm) | 5.1(Max) |
| Package Width (mm) | 4.1(Max) |
| Package Height (mm) | 8.2(Max) |
| Seated Plane Height (mm) | 10.4(Max) |
| Package Weight (g) | 0.36 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Jedec | TO-92 |
| Configuration | Single |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | P |
| Number of Elements per Chip | 1 |
| Maximum Drain Source Voltage | 50V |
| Maximum Gate Source Voltage | ±20V |
| Maximum Continuous Drain Current | 5A |
| Material | Si |
| Maximum Drain Source Resistance | 190@10VmOhm |
| Typical Gate Charge @ Vgs | 18@10VnC |
| Typical Gate Charge @ 10V | 18nC |
| Typical Input Capacitance @ Vds | 470@10VpF |
| Maximum Power Dissipation | 900mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
| Cage Code | S0562 |
| HTS Code | 8541210095 |
| Schedule B | 8541210080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
Download the complete datasheet for Toshiba 2SJ537(T6MDNSI) to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.