N-channel enhancement mode power MOSFET featuring a 900V drain-source voltage and 5A continuous drain current. This single-element silicon transistor utilizes pi-MOS III process technology and is housed in a 3-pin TO-220NIS through-hole package with a tab. Key specifications include a maximum drain-source on-resistance of 2500 mOhm at 10V, typical gate charge of 45nC at 10V, and typical input capacitance of 1200pF at 25V. Maximum power dissipation is 45W, with an operating temperature range of -55°C to 150°C.
PackageTO-220NIS
MountingThrough Hole
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Technical Specifications
Toshiba 2SK2717(MURATA3) technical specifications.
General
| Basic Package Type | Through Hole |
| Package Family Name | TO-220 |
| Package/Case | TO-220NIS |
| Package Description | Transistor Outline Package |
| Lead Shape | Through Hole |
| Pin Count | 3 |
| PCB | 3 |
| Tab | Tab |
| Package Length (mm) | 10 |
| Package Width (mm) | 4.5 |
| Package Height (mm) | 15 |
| Seated Plane Height (mm) | 15 + 5.6(Max) |
| Pin Pitch (mm) | 2.54 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Configuration | Single |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 1 |
| Process Technology | pi-MOS III |
| Maximum Drain Source Voltage | 900V |
| Maximum Gate Source Voltage | ±30V |
| Maximum Continuous Drain Current | 5A |
| Material | Si |
| Maximum Drain Source Resistance | 2500@10VmOhm |
| Typical Gate Charge @ Vgs | 45@10VnC |
| Typical Gate Charge @ 10V | 45nC |
| Typical Input Capacitance @ Vds | 1200@25VpF |
| Maximum Power Dissipation | 45000mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
Compliance
| Cage Code | S0562 |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
Datasheet
Toshiba 2SK2717(MURATA3) Datasheet
Download the complete datasheet for Toshiba 2SK2717(MURATA3) to view detailed technical specifications.
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