N-channel enhancement mode power MOSFET designed for through-hole mounting. Features a 60V drain-source voltage, 2A continuous drain current, and a maximum gate-source voltage of ±20V. Housed in a 3-pin TO-92 Mod plastic package with a maximum drain-source on-resistance of 270 mΩ at 10V. Typical gate charge is 5.8 nC, and input capacitance is 170 pF. Maximum power dissipation is 900 mW, with an operating temperature range of -55°C to 150°C.
Toshiba 2SK2961(T6NISAN) technical specifications.
| Basic Package Type | Through Hole |
| Package Family Name | TO-92 |
| Package/Case | TO-92 Mod |
| Package Description | Plastic Header Style Package |
| Lead Shape | Through Hole |
| Pin Count | 3 |
| PCB | 3 |
| Package Length (mm) | 5.1(Max) |
| Package Width (mm) | 4.1(Max) |
| Package Height (mm) | 8.2(Max) |
| Seated Plane Height (mm) | 10.4(Max) |
| Package Weight (g) | 0.36 |
| Package Material | Plastic |
| Mounting | Through Hole |
| Jedec | TO-92 |
| Configuration | Single |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | N |
| Number of Elements per Chip | 1 |
| Process Technology | L2-pi-MOS V |
| Maximum Drain Source Voltage | 60V |
| Maximum Gate Source Voltage | ±20V |
| Maximum Continuous Drain Current | 2A |
| Material | Si |
| Maximum Gate Threshold Voltage | 2V |
| Maximum Drain Source Resistance | 270@10VmOhm |
| Typical Gate Charge @ Vgs | 5.8@10VnC |
| Typical Gate Charge @ 10V | 5.8nC |
| Typical Input Capacitance @ Vds | 170@10VpF |
| Maximum Power Dissipation | 900mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
| Typical Output Capacitance | 75pF |
| Cage Code | S0562 |
| HTS Code | 8541210095 |
| Schedule B | 8541210080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
Download the complete datasheet for Toshiba 2SK2961(T6NISAN) to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.