CMOS OR Gate IC, featuring a single 2-input OR element. This surface-mount logic gate operates within a -40°C to 85°C temperature range and is housed in a 5-pin SMV (Small Outline Transistor) package, specifically a SSOP family type with a SOT-25 Jedec designation. The package measures 2.9mm in length, 1.6mm in width, and 1.1mm in height, with a 0.95mm pin pitch and gull-wing lead shape for efficient surface mounting.
PackageSMV
MountingSurface Mount
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Technical Specifications
Toshiba TC4S71F(T5LCANO) technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SSOP |
| Package/Case | SMV |
| Package Description | Small Outline Transistor |
| Lead Shape | Gull-wing |
| Pin Count | 5 |
| PCB | 5 |
| Package Length (mm) | 2.9 |
| Package Width (mm) | 1.6 |
| Package Height (mm) | 1.1 |
| Seated Plane Height (mm) | 1.15 |
| Pin Pitch (mm) | 0.95 |
| Package Weight (g) | 0.014 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | SOT-25 |
| Logic Family | 4000B |
| Logic Function | OR |
| Process Technology | CMOS |
| Number of Elements per Chip | 1 |
| Number of Element Inputs | 2-IN |
| Number of Element Outputs | 1 |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | S0562 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Toshiba TC4S71F(T5LCANO) Datasheet
Download the complete datasheet for Toshiba TC4S71F(T5LCANO) to view detailed technical specifications.
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