CMOS 2-input NAND gate IC featuring 4 independent NAND elements. This integrated circuit offers a 14-pin Plastic Dual In Line Package (PDIP) with through-hole mounting and a standard 2.54mm pin pitch. Operating across a temperature range of -40°C to 85°C, the component is housed in a plastic package measuring 19.75mm in length, 6.4mm in width, and 3.5mm in height.
PackagePDIP
MountingThrough Hole
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Technical Specifications
Toshiba TC74HC00AP(ID) technical specifications.
General
Basic Package Type
Through Hole
Package Family Name
DIP
Package/Case
PDIP
Package Description
Plastic Dual In Line Package
Lead Shape
Through Hole
Pin Count
14
PCB
14
Package Length (mm)
19.75(Max)
Package Width (mm)
6.4
Package Height (mm)
3.5
Seated Plane Height (mm)
4.15
Pin Pitch (mm)
2.54
Package Weight (g)
0.96
Package Material
Plastic
Mounting
Through Hole
Jedec
MS-001AA
Logic Family
HC
Logic Function
NAND
Process Technology
CMOS
Number of Elements per Chip
4
Number of Element Inputs
2-IN
Number of Element Outputs
1
Min Operating Temperature
-40°C
Max Operating Temperature
85°C
Compliance
Cage Code
S0562
EU RoHS
No
HTS Code
8542390001
Schedule B
8542390000
ECCN
EAR99
Automotive
No
AEC Qualified
No
PPAP
No
Radiation Hardening
No
RoHS Versions
2011/65/EU, 2015/863
Datasheet
Toshiba TC74HC00AP(ID) Datasheet
Download the complete datasheet for Toshiba TC74HC00AP(ID) to view detailed technical specifications.
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