Positive-edge triggered, non-inverting D-type bus interface flip-flop, featuring 3-state outputs and a single element per chip. This CMOS logic IC offers 20 inputs and 20 outputs, designed for surface mounting within a 56-pin TSSOP (Thin Shrink Small Outline Package) with gull-wing leads. The lead-frame SMT package, measuring 14mm x 6.1mm x 1mm, is constructed from plastic and conforms to JEDEC MO-153EE standards, operating across a temperature range of -40°C to 85°C.
PackageTSSOP
MountingSurface Mount
PolarityNon-Inverting
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Technical Specifications
Toshiba TC74VCX162721FT(EL technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSSOP |
| Package Description | Thin Shrink Small Outline Package |
| Lead Shape | Gull-wing |
| Pin Count | 56 |
| PCB | 56 |
| Package Length (mm) | 14 |
| Package Width (mm) | 6.1 |
| Package Height (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-153EE |
| Logic Family | VCX |
| Logic Function | D-Type Bus Interface |
| Process Technology | CMOS |
| Number of Elements per Chip | 1 |
| Number of Element Inputs | 20 |
| Number of Element Outputs | 20 |
| Output Type | 3-State |
| Polarity | Non-Inverting |
| Triggering Type | Positive-Edge |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | S0562 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Toshiba TC74VCX162721FT(EL Datasheet
Download the complete datasheet for Toshiba TC74VCX162721FT(EL to view detailed technical specifications.
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