Positive-edge triggered D-type bus interface flip-flop, featuring a single 8-input, 8-output element within a 20-pin TSSOP package. This surface-mount component utilizes CMOS process technology and belongs to the VHC logic family, offering non-inverting logic. The thin shrink small outline package has a 0.65mm pin pitch and a maximum length of 6.9mm, designed for lead-frame SMT mounting. Operating across a temperature range of -40°C to 85°C, it conforms to Jedec standard MO-153AC.
PackageTSSOP
MountingSurface Mount
PolarityNon-Inverting
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Technical Specifications
Toshiba TC74VHC273FT(SOE) technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | TSSOP |
| Package Description | Thin Shrink Small Outline Package |
| Lead Shape | Gull-wing |
| Pin Count | 20 |
| PCB | 20 |
| Package Length (mm) | 6.9(Max) |
| Package Width (mm) | 4.4 |
| Package Height (mm) | 1 |
| Seated Plane Height (mm) | 1.2(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-153AC |
| Logic Family | VHC |
| Logic Function | D-Type Bus Interface |
| Process Technology | CMOS |
| Number of Elements per Chip | 1 |
| Number of Element Inputs | 8 |
| Number of Element Outputs | 8 |
| Polarity | Non-Inverting |
| Triggering Type | Positive-Edge |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
Compliance
| Cage Code | S0562 |
| EU RoHS | No |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Datasheet
Toshiba TC74VHC273FT(SOE) Datasheet
Download the complete datasheet for Toshiba TC74VHC273FT(SOE) to view detailed technical specifications.
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