32-bit RISC microcontroller featuring an ARM Cortex M3 core, operating at up to 80 MHz. This MCU offers 512KB of Flash program memory and 32KB of RAM. It is housed in a 100-pin PQFP (Plastic Quad Flat Package) with a 0.65mm pin pitch, designed for surface mounting. Key interfaces include I2C and 4 UARTs, alongside 22 ADC channels from dual ADCs. The device supports a maximum operating supply voltage of 5.5V and operates within a temperature range of -40°C to 85°C.
PackagePQFP
MountingSurface Mount
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Technical Specifications
Toshiba TMPM376FDDFG technical specifications.
General
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | QFP |
| Package/Case | PQFP |
| Package Description | Plastic Quad Flat Package |
| Lead Shape | Gull-wing |
| Pin Count | 100 |
| PCB | 100 |
| Package Length (mm) | 20 |
| Package Width (mm) | 14 |
| Package Height (mm) | 2.7 |
| Seated Plane Height (mm) | 3.05(Max) |
| Pin Pitch (mm) | 0.65 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Jedec | MO-112CC-1 |
| Family Name | TX03 |
| Data Bus Width | 32bit |
| Instruction Set Architecture | RISC |
| Maximum Clock Rate | 80MHz |
| Maximum CPU Frequency | 80MHz |
| Device Core | ARM Cortex M3 |
| Program Memory Type | Flash |
| Program Memory Size | 512KB |
| RAM Size | 32KB |
| Number of Programmable I/Os | 80 |
| Core Architecture | ARM |
| Programmability | Yes |
| Number of Timers | 8 |
| Interface Type | I2C/SIO/UART |
| CAN | 0 |
| I2C | 1 |
| SPI | 0 |
| Ethernet | 0 |
| UART | 4 |
| USART | 0 |
| USB | 0 |
| I2S | 0 |
| Max Operating Supply Voltage | 5.5V |
| Min Operating Temperature | -40°C |
| Max Operating Temperature | 85°C |
| ADC Channels | 22/22 |
| Number of ADCs | Dual |
Compliance
| Cage Code | S0562 |
| HTS Code | 8542310001 |
| Schedule B | 8542310000 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
Datasheet
Toshiba TMPM376FDDFG Datasheet
Download the complete datasheet for Toshiba TMPM376FDDFG to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.