
P-channel enhancement mode power MOSFET featuring 40V drain-source voltage and 8A continuous drain current. This single element silicon transistor utilizes U-MOS III process technology and is housed in an 8-pin SOP (Small Outline Package) with gull-wing leads for surface mounting. Key electrical characteristics include a maximum gate-source voltage of ±20V, a maximum drain-source on-resistance of 25mΩ at 10V, and a typical gate charge of 48nC. The compact plastic package measures 5.5mm x 4.4mm x 1.5mm, suitable for PCB applications.
Toshiba TPC8110(T2LTAMRS) technical specifications.
| Basic Package Type | Lead-Frame SMT |
| Package Family Name | SOP |
| Package/Case | SOP |
| Package Description | Plastic Small Outline Package |
| Lead Shape | Gull-wing |
| Pin Count | 8 |
| PCB | 8 |
| Package Length (mm) | 5.5(Max) |
| Package Width (mm) | 4.4 |
| Package Height (mm) | 1.5 |
| Seated Plane Height (mm) | 1.6 |
| Pin Pitch (mm) | 1.27 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Configuration | Single Quad Drain Triple Source |
| Category | Power MOSFET |
| Channel Mode | Enhancement |
| Channel Type | P |
| Number of Elements per Chip | 1 |
| Process Technology | U-MOS III |
| Maximum Drain Source Voltage | 40V |
| Maximum Gate Source Voltage | ±20V |
| Maximum Continuous Drain Current | 8A |
| Material | Si |
| Maximum Gate Threshold Voltage | 2V |
| Maximum Drain Source Resistance | 25@10VmOhm |
| Typical Gate Charge @ Vgs | 48@10VnC |
| Typical Gate Charge @ 10V | 48nC |
| Typical Input Capacitance @ Vds | 2180@10VpF |
| Maximum Power Dissipation | 1900mW |
| Min Operating Temperature | -55°C |
| Max Operating Temperature | 150°C |
| Cage Code | S0562 |
| HTS Code | 8541290095 |
| Schedule B | 8541290080 |
| ECCN | EAR99 |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
Download the complete datasheet for Toshiba TPC8110(T2LTAMRS) to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.