Field Programmable Gate Array (FPGA) featuring 192 Configurable Logic Blocks (CLBs) and an estimated 50,000 system gates. Operates at a maximum clock frequency of 630 MHz with a 1728-cell architecture. This CMOS device is housed in a 144-terminal, 22 x 22 mm TQFP package, offering 97 inputs and 97 outputs. Nominal supply voltage is 1.2V, with a range of 1.14V to 1.26V.
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Technical Specifications
Xilinx XC3S50-4TQG144I technical specifications.
General
| Number of Terminals | 144 |
| Terminal Position | QUAD |
| JEDEC Package Code | S-PQFP-G144 |
| Width | 20 |
| Length | 20 |
| Pin Count | 144 |
| Supply Voltage-Nom | 1.2 |
| Supply Voltage-Min | 1.14 |
| Supply Voltage-Max | 1.26 |
| Number of Outputs | 97 |
| Clock Frequency-Max | 630 |
| Number of Inputs | 97 |
Compliance
| RoHS | Yes |
| Eccn Code | EAR99 |
| Lead Free | Yes |
| HTS Code | 8542.39.00.01 |
| REACH | Compliant |
| Military Spec | False |
Datasheet
Xilinx XC3S50-4TQG144I Datasheet
Download the complete datasheet for Xilinx XC3S50-4TQG144I to view detailed technical specifications.
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