
Field Programmable Gate Array (FPGA) with 101,261 logic cells and 126,576 registers, built on 45nm process technology. Features 4,824 Kbit RAM, 360 18x18 multipliers, and 180 dedicated DSP slices. Offers 326 maximum user I/Os and 18 DLLs/PLLs. Packaged in a 484-pin Fine Pitch Ball Grid Array (FBGA) with a 1mm pin pitch, suitable for surface mounting. Operates within a temperature range of 0°C to 85°C.
Xilinx XC6SLX100-3FGG484C technical specifications.
| Basic Package Type | Ball Grid Array |
| Package Family Name | BGA |
| Package/Case | FBGA |
| Package Description | Fine Pitch Ball Grid Array |
| Lead Shape | Ball |
| Pin Count | 484 |
| PCB | 484 |
| Package Length (mm) | 23 |
| Package Width (mm) | 23 |
| Package Height (mm) | 1.7 |
| Seated Plane Height (mm) | 2.2 |
| Pin Pitch (mm) | 1 |
| Package Material | Plastic |
| Mounting | Surface Mount |
| Family Name | Spartan®-6 LX |
| Maximum Number of User I/Os | 326 |
| Number of Registers | 126576 |
| RAM Bits | 4824Kbit |
| Device Logic Cells | 101261 |
| Process Technology | 45nm |
| Number of Multipliers | 360 (18x18) |
| Programmability | Yes |
| Transceiver Speed | 3.2Gbps |
| Program Memory Type | SRAM |
| Min Operating Temperature | 0°C |
| Max Operating Temperature | 85°C |
| Dedicated DSP | 180 |
| Speed Grade | 3 |
| Device Number of DLLs/PLLs | 18 |
| Total Number of Block RAM | 268 |
| Cage Code | 68994 |
| EU RoHS | Yes |
| HTS Code | 8542390001 |
| Schedule B | 8542390000 |
| ECCN | 3A991.d |
| Automotive | No |
| AEC Qualified | No |
| PPAP | No |
| Radiation Hardening | No |
| RoHS Versions | 2011/65/EU, 2015/863 |
Download the complete datasheet for Xilinx XC6SLX100-3FGG484C to view detailed technical specifications.
This datasheet cannot be embedded due to technical restrictions.